FAB INTELLIGENCE DOSSIER
Marcy, NY · 200mm SiC power devices · Generated 26 May 2026
Process / wafer
200mm SiC power devices, fully automated
Q3 FY26 underutilization charge
~$46M / quarter
CHIPS PMT exposure
$750M proposed; 30% MVF capacity expansion gated on milestones
Signal strength
Post-Ch.11 turnaround, new CEO, yield is the explicit lever
| Parent | Wolfspeed, Inc. (NYSE: WOLF), HQ Durham, NC; emerged from Chapter 11 on Sep 29, 2025 |
| Site | Marcy Nanocenter, Oneida County, NY — world's first purpose-built fully automated 200mm SiC fab |
| Process | 200mm SiC MOSFET / diode device fab; all Wolfspeed device production now consolidated here after Durham 150mm shutdown |
| End markets | EV powertrain (primary), AI data center power, industrial & energy, aerospace & defense |
| Capacity status | Q1 FY26 MVF revenue $97M (vs. $49M YoY); ~90% of Power Products revenue in Q3 FY26 came from MVF |
| Funding | Oct 2024 preliminary CHIPS PMT for up to $750M; ~$33M of NY State incentive receipts in Q3 FY26 offset ~$38M gross CapEx |
| Leadership | Robert Feurle, CEO since May 1, 2025 (ex-ams-OSRAM, Infineon, Micron); manufacturing + quality under Dr. David Emerson, EVP & COO (rejoined June 2025) |
Underutilization explicitly named as the primary gross-margin driver on Q3 FY26 call
May 2026On the May 5, 2026 call, CFO Gregor van Issum stated that the transition to Mohawk Valley for full device production and the parallel realignment of go-to-market strategy across distinct verticals represent substantial operational and strategic milestones , while telling analysts that management expects continued underutilization costs until market demand aligns with expanded production capacity . Q3 FY26 non-GAAP gross margin was -20.6% with a ~$46M underutilization charge against ~$100M in Power Products revenue, ~90% of which came out of MVF. This is the single largest lever to fix — every additional wafer that yields cleanly through MVF compresses underutilization directly into margin.
Q1 FY26 release names MVF and Siler City as the sources of $47M underutilization
Oct 2025Wolfspeed's October 29, 2025 release stated that GAAP and non-GAAP gross margin includes the impacts of underutilization costs related to the Mohawk Valley Fab and Siler City Fab. Underutilization was $47 million, compared to $26 million . CEO Robert Feurle framed the strategy as focusing on operational excellence by improving quality, cost, and speed across its facilities . MVF contributed $97M in Q1 FY26 revenue versus $49M a year prior — the fab is filling up, but underutilization charges roughly doubled YoY, which is the textbook profile of a ramp that needs faster yield learning per wafer.
New CEO Robert Feurle took over May 1, 2025 with explicit operational-excellence mandate
Mar 2025Wolfspeed announced the appointment of Robert Feurle as Chief Executive Officer (CEO), effective May 1, 2025, following a comprehensive internal and external search by the Board of Directors. Feurle succeeds Thomas Werner, who is serving as interim Executive Chairman. Feurle is ex-ams-OSRAM (Opto Semis), Infineon (where he led IGBT and silicon-carbide product lines), and Micron. On the Q3 FY26 call he stated his three priorities as advancing technology leadership, demonstrating strict financial discipline, and driving operational excellence — quality, cost, speed. New CEOs at Y+12 months tend to back tools that visibly tighten the engineering feedback loop; this is the window.
Snowflake-based AI factory-data platform deployed across Wolfspeed in Q3 FY26
May 2026Feurle on the Q3 FY26 call described that the transition to Mohawk Valley for full device production and the parallel realignment of go-to-market strategy across distinct verticals represent substantial operational and strategic milestones , and separately said the company has unified factory, supply chain, and enterprise data on a single Snowflake platform with AI-driven tools for real-time insights. Translation for an AI-vision vendor: the data plumbing is being built right now, the engineering culture is being told to use AI tools, and the defect-classification layer is the obvious next gap — Snowflake gives them the warehouse, not the SEM/optical inspection classifier.
Open Marcy reqs for Yield Engineer, Defect Yield Engineer, Metrology Engineer
May 2026LinkedIn shows active Marcy, NY listings for Yield Engineer, Defect Yield Engineer, and Defect/Yield Engineering Intern under Wolfspeed. A ZipRecruiter snapshot of the Marcy Yield Engineer req lists requirements including strong semiconductor process knowledge an yield improvement · Background in device physics and experience analyzing PCM and probe data · Proficient in statistical data analysis using JMP and able to write scripts to pull relevant data (in-fab monitors, defect, PCM, probe, etc..) . Wolfspeed is trying to solve this in-house today; an external defect-classifier platform competes with hiring more PCM/JMP-scripting engineers and waiting for them to ramp.
CHIPS Act PMT ties $750M and 30% MVF capacity expansion to milestones
Oct 2024Per the Schumer announcement, the proposed CHIPS funding will support the Mohawk Valley fab to increase its production capacity by approximately 30% , with the disbursement of funds will be conditioned upon the achievement of certain operational and construction milestones and other requirements . Capacity adds without yield throughput just expands the underutilization line — every milestone Wolfspeed signs up for converts directly into pressure on the MVF yield/defect-engineering bench.
Robert Feurle
Chief Executive Officer, Wolfspeed Inc.
Started May 1, 2025. ~20 years in power semis at Infineon (IGBT + SiC product lines), Micron, Qimonda, Siemens; most recently EVP Opto Semis at ams-OSRAM. Public mandate: operational excellence, quality/cost/speed, return to free-cash-flow positive.
Dr. David Emerson
EVP & Chief Operating Officer (manufacturing, procurement, planning, facilities, quality)
Rejoined Wolfspeed June 2025 as EVP and COO. Oversees the company's manufacturing, procurement and planning, facilities, and quality divisions — i.e., owns the MVF P&L and the operational-excellence mandate Feurle stated on the Q3 FY26 call. Right escalation point above the MVF site team.
Sr Fab Operations Manager — Mohawk Valley Fab
Based in upstate NY (Staatsburg). Day-to-day fab-ops management at MVF — between the shift supervisors and the SVP layer. Education: Mount Saint Mary College. The right peer for an engineering-side first touch on yield/defect workflow.
SVP, Global Materials Operations (former VP of Mohawk Valley Fab)
BS EE, NC State. Led the MVF NY startup team from Nov 2019 — split between the 200mm pilot at SUNY Albany and the Marcy construction site — before being promoted to SVP Global Materials Ops in Feb 2023. Knows MVF's process flow and tool set cold; now responsible for Siler City and Durham materials feeding MVF wafer starts.
+ 6 more identified · full list in export
Underutilization is the named #1 margin lever — yield velocity per wafer is the actual fix
Confidence: highQ3 FY26: ~$46M underutilization, ~$100M Power revenue, ~90% from MVF. Q1 FY26: $47M underutilization on Mohawk Valley + Siler City. CFO Gregor van Issum told analysts (paraphrased) that underutilization continues to be the primary driver of gross margin and improving factory utilization remains one of the most important levers. The yield engineering team's velocity — how fast they can isolate a defect mode, retrain the classifier, and feed back to the responsible tool/chamber — is what compresses underutilization without waiting for end-market demand. This is the lever MVF can actually pull internally.
SIXSENSE ANGLE
No-code defect classifier trained per fab on MVF's own SEM/optical/die-level images, with a closed-loop tie from classification back to specific tool / chamber / lot signals so the Marcy yield team gets a same-day feedback cycle instead of waiting on a vendor's quarterly retraining.
200mm-scale defect modes (BPDs, TSDs, micropipes, EPDs) need reclassification vs. legacy 150mm
Confidence: highWolfspeed itself describes that the improved crystal growth process for 200mm SiC has resulted in 200mm wafers with reduced micropipe densities (MPDs), threading screw dislocations (TSDs), basal plane dislocations (BPDs), and overall etch pit densities (EPDs) compared to our current 150mm SiC wafers . Moving the device process onto 200mm substrates changes both the killer-defect mix and the per-wafer economics — a defect that was tolerable at 150mm now wipes out 70%+ more dies. The Marcy yield/defect-engineering reqs explicitly ask for PCM and probe data analysis in JMP plus scripting against in-fab monitors and defect data, which is the manual workflow a defect-classification platform replaces.
SIXSENSE ANGLE
Configurable inspection logic: MVF engineers author and tune the per-defect-mode rules and ROIs that drive BPD / TSD / micropipe classification on 200mm wafers without retraining a vendor's black-box model — the right lever during a ramp where inspection criteria are still moving.
Post-Chapter-11 CEO needs visible operational-excellence wins in calendar 2026
Confidence: mediumFeurle (paraphrased) said three priorities are advancing technology leadership, financial discipline, and driving operational excellence — quality, cost, and speed. The Snowflake announcement positions Wolfspeed as having unified factory + supply-chain + enterprise data and deployed AI-driven tools for real-time insights and faster decision-making. That's the data warehouse layer. The defect-classification layer that sits between SEM/optical metrology and that warehouse is the obvious next gap, and it's exactly the layer that produces engineer-facing 'we cut time-to-disposition from days to hours' numbers a new CEO can take to the next earnings call.
SIXSENSE ANGLE
Closed-loop yield feedback layered on top of Wolfspeed's Snowflake data platform — defect classifications tied back to specific tool / chamber / lot signals, surfaced to MVF process integration in days, not quarters, giving Feurle a measurable operational-excellence story for FY27.
CHIPS milestones gate $750M PMT on capacity ramp Wolfspeed cannot underwrite with manual yield workflows
Confidence: mediumSchumer's office stated the PMT will support an ~30% MVF capacity expansion via additional photolithography, ion implant, metal-dep, etch, and automation tooling. Each new toolset entering MVF resets the per-tool defect-mode baseline and demands the yield team requalify classifiers. The milestone structure means the funding flows only as capacity is actually demonstrated — not as it's built. A platform that lets fab engineers stand up a new classifier in days (not the months-to-quarters typical of vendor-built models) shortens the qualification-to-volume window the CHIPS milestones are written against.
SIXSENSE ANGLE
Process-agnostic, no-code defect-classification per tool/module — MVF process integration engineers stand up classifiers for newly installed litho/implant/etch tools in days, compressing the CHIPS milestone clock between 'tool installed' and 'tool producing at qualified yield'.
Gen 4 Silicon Carbide Technology: Redefining Performance and Durability in High-Power Applications
Adam Barkley (VP, Power Technology Development, Wolfspeed) · Wolfspeed technical white paper (associated with Gen 4 platform launch)
Silicon Carbide (SiC) Power Module Reliability: Power Cycling and Lifetime Modeling Approach
Mauro Ceresa (Sr Director, Field Apps Eng.), Robert Shaw (Sr Manager, Power Module Reliability) — Wolfspeed · Wolfspeed Knowledge Center technical paper
Dr. Cengiz Balkas, Chief Business Officer, Wolfspeed · Wolfspeed press release + Power Electronics News technical commentary
Open with Doug Collignon, not the EVP layer. He's the Sr Fab Ops Manager living inside MVF day-to-day — close enough to the line to feel the underutilization hit on every shift, senior enough to forward a credible vendor pitch upward to David Emerson's org without it dying in his inbox. EVP/SVP layer (Emerson, Milton) is the right CC, not the right opener; senior fab operations leaders inside post-Ch.11 Wolfspeed are deeply scheduled, and the cold-open hit rate at that level right now is near zero. Doug is the right peer.
Lead with the underutilization quote from the May 5, 2026 earnings call and a single concrete question: 'On the Q3 call your CFO named factory utilization as the most important lever for margin expansion — when MVF brings up the next process tool under the CHIPS expansion, how is your defect-engineering team standing up the classifier for that toolset?' That's not 'how is the ramp going.' That's a specific question about the exact workflow SixSense's no-code classifier and configurable inspection logic replace. Reference Adam Barkley's January 2025 Gen 4 white paper to show you've read the technology stack, not just the press releases.
Timing matters. Feurle is ~12 months into the CEO seat, fresh out of Chapter 11, with a Snowflake AI deployment announced on the most recent call and ~$46M of underutilization landing in the P&L every quarter. The political will to fund operational-excellence tooling is highest in the first 18 months of a turnaround CEO, and the data plumbing (Snowflake) is being put in place right now. Six months from now MVF will either have already chosen an in-house ML-based approach (built around the JMP/PCM workflow on the open Marcy reqs) or signed with a competing platform. Move in the next quarter.
DRAFT EMAIL TO DOUG COLLIGNON
SubjectMVF defect-classifier velocity ahead of CHIPS Phase 2
Hi Doug, I was on the May 5 Wolfspeed call — when Gregor named factory utilization as the single biggest lever for margin expansion, the math on the wafer-throughput side was clear, but the piece I keep coming back to is the classifier side. Specifically: when the next litho or implant toolset comes in under the CHIPS Phase 2 expansion, how is the MVF defect-engineering team standing up inspection rules and per-tool classifiers today — JMP scripts against in-line monitor data plus PCM/probe correlation, or something more on the SEM/optical visual side? The reason I ask: we work with fab engineering teams on the layer where engineers author and tune that classification logic themselves, in days rather than the quarter-or-more cycle most vendor models take. The 200mm BPD/TSD reclassification problem (vs. legacy 150mm) is exactly where that approach tends to pay back fastest. Not a pitch — would honestly love your read on whether the bottleneck you're seeing right now is the inspection-rule authoring layer, somewhere upstream in metrology, or somewhere else entirely. Thanks, [Your name]